International Standards and Conformity Assessment for all electrical, electronic and related technologies

TC 91

Electronics assembly technology

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub

Date

Stability

Date

TC 91WG 2 WPUB  

History

Stage
Document
Downloads
Decision Date
Target Date
CFDIS
93/194/FDIS
2004-02-06 
APUB
93/199/RVD PDF file 90 kB
2004-04-222004-05
DECPUB
2004-05-10 
RFDIS
2004-06-032004-06
BPUB
2004-09-022005-01
PPUB
2004-10-072005-02
WPUB
93/294/RR PDF file 19 kB
2010-08-03 
  

Abstract

Providse a standard method of modeling ASICs in VHDL.This method is aimed at providing efficient, accurate,and tool independent simulation suitable for large chip-level designs typical of those which are based on ASICs. This publication has the status of a double logo IEEE/IEC standard

Project

IEC 61691-5:2004 ED1

Behavioural languages - Part 5: VITAL ASIC (application specific integrated circuit) modeling specification

 

 

Associated Documents:

93/241/MCR

PDF file 33 kB