Electronics assembly technology
|TC 91||WG 13||PPUB|| ||2021|
The Standard Delay Format (SDF)is an existing OVI standard for the representation and interpretation of timing data for use at any stage of the electronic design process.The ASCII data in the SDF le is represented in a tool and language independent way and includes path delays,timing constraint values,inter-connect delays and high level technology parameters. This standard is published with a double logo IEC-IEEE. standard.
IEC 61523-3:2004 ED1
Delay and power calculation standards - Part 3: Standard Delay Format (SDF) for the electronic design process