International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub

Date

Stability

Date

SC 47DMr Yutaka KumanoPWI  

History

Stage
Document
Downloads
Decision Date
Target Date
PWI
2019-11-05 
prePNW
2020-07-072020-03
PWI
2020-07-072020-07
 2020-07


Project

PWI TR 47D-3 ED1

Future IEC TR 60191-7-5 Ed.1: 3D semiconductor package model for precise thermal analysis (JTAM)