International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub

Date

Stability

Date

SC 47DWG 2 Ichiro AnjohDEL  

History

Stage
Document
Downloads
Decision Date
Target Date
PNW
47D/133/NP  
1996-08-02 
ANW
47D/179/RVN  
1996-12-171996-12
ACDV
1997-09-19 
DEL
1999-01-121997-12
  

Project

IEC 60191-6/AMD1/FRAG3 ED1

O value of leaded packages with two parallel rows of terminals in IEC 191-6, Appendix B1

 

 

Associated Documents:

47D/203/RM