International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub

Date

Stability

Date

SC 47DWG 1 Mr.Ichiro AnjohMERGED  

History

Stage
Document
Downloads
Decision Date
Target Date
PNW
47D/336/NP PDF file 118 kB
1999-12-17 
ANW
47D/368/RVN PDF file 16 kB
2000-04-142000-04
ACDV
2000-05-122000-06
CCDV
47D/398/CDV PDF file 35 kB
2000-09-222000-09
AFDIS
47D/431/RVC PDF file 26 kB
2001-04-092001-04
DECFDIS
2001-04-102001-05
RFDIS
2001-04-102001-06
CFDIS
47D/440/FDIS
2001-05-182001-07
APUB
47D/457/RVD PDF file 21 kB
2001-07-252001-08
BPUB
2001-07-262001-09
MERGED
2001-07-30 
  

Project

IEC 60191-2/FRAG47 ED1

Proposal for 3-Leaded SMD (Body Size D x E : 2.9 x 1.5 mm) Outline Family 162E

 

 

Associated Documents:

47D/381/RM

PDF file 68 kB