SC 47D

Semiconductor devices packaging

 
export to xls file

SC 47D Work programme (6)

Project

Reference

Document

Reference

Init.

Date

Current

Stage

Next

Stage

Working

Group

Project

Leader

Fcst. Publ.

Date

PWI TR 47D-1 ED1

Future IEC TR 60191-7 Ed.1: Requirements to design electronics devices using thermal characteristics of semiconductor packages

PWI
  • PWI
  • Preliminary work item

2020-07

2020-03

Yutaka Kumano
PWI TR 47D-2 ED1

Future IEC TR 60191-7-3 Ed.1: Proposal of new thermal model format for semiconductor packages

PWI
  • PWI
  • Preliminary work item

2020-07

2020-11

Yutaka Kumano
PWI TR 47D-3 ED1

Future IEC TR 60191-7-5 Ed.1: 3D semiconductor package model for precise thermal analysis (JTAM)

PWI
  • PWI
  • Preliminary work item

2020-07

2020-07

Yutaka Kumano
PWI TR 47D-4 ED1

Future IEC TR 60191-7-1 Ed.1: A new transient thermal model of semiconductor packages (D2ELPHI)

PWI
  • PWI
  • Preliminary work item

2020-07

2020-03

Yutaka Kumano
PWI TR 47D-5 ED1

Future IEC TR 60191-7-2 Ed.1: Thermal conductivity measurement method and samples for electronic components

PWI
  • PWI
  • Preliminary work item

2020-07

2020-11

Yutaka Kumano
PWI TR 47D-6 ED1

Future IEC TR 60191-7-4 Ed.1: Printed circuit board specifications to evaluate thermal characteristics of fine pitch semiconductor packages

PWI
  • PWI
  • Preliminary work item

2020-07

2020-11

Yutaka Kumano