SC 47D

Semiconductor devices packaging

Vote for P-Members

P-Members Voting	P-Members In favour	In favour %	Criteria	Result
8	5	62.5	>=66.7%	REJECTED

All Votes

Total Votes Cast	Total Against	Against %	Criteria	Result
10	3	30	<=25%	REJECTED

Voting Result

REJECTED

Document 47D/829/FDIS

Project : IEC 60191-6-5 Ed. 2.0

IEC 60191-6-5 Ed.2: Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

Reference	Circulation date	Closing date	Downloads
47D/829/FDIS	2012-10-05	2012-12-07
Voting Result
47D/830/RVD	2012-12-14		112 kB

Result of Voting

Country	Status	Received	Vote	Comments
Austria	P	2012-12-06	A	-
Belarus	O	2012-11-30	A	-
Belgium	P	2012-12-06	N	Y
China	P	2012-12-07	Y	-
Czech Republic	O
Denmark	O	2012-12-05	A	-
Finland	P	2012-11-02	A	-
France	P	2012-12-06	A	-
Germany	P	2012-12-06	N	Y
Greece	-	2012-12-04	A	-
Italy	O	2012-12-04	A	-
Japan	P	2012-11-09	Y	-
Korea, Republic of	P	2012-12-03	Y	-
Netherlands	O	2012-12-05	A	-
Pakistan	P	2012-12-05	Y	-
Poland	O	2012-12-06	A	-
Portugal	O	2012-12-07	A	-
Qatar	-	2012-12-05	Y	-
Romania	O
Russian Federation	O	2012-12-07	Y	-
Spain	O	2012-12-05	A	-
Sweden	O
Thailand	O
Ukraine	O
United Kingdom	P	2012-11-15	Y	-
United States of America	P	2012-12-07	N	Y

NOTES:

Vote: Does the National Committee agree to publish the FDIS as an International Standard:
Y = In favour; N = Against; A = Abstention.

Only votes received before the closing date are counted in determining the decision.
Late Votes: (0).

Abstentions are not taken into account when totalizing the votes.

P-members not voting: (0).

*Comments rejected because they were not submitted in the IEC Comment form.
**Vote rejected due to lack of justification statement.

International

Electrotechnical

Commission