International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub

Date

Stability

Date

SC 47DWG 2S. MiyashitaCDIS2016-112020

History

Stage
Document
Downloads
Decision Date
Target Date
AMW
47D/832/RR PDF file 63 kB
2013-05-02 
1CD
47D/834/CD PDF file 163 kB
2013-05-032013-11-30
CDM
47D/839/CC Word file 99 kB
PDF file 58 kB
47D/839A/CC Word file 101 kB
PDF file 58 kB
2013-09-04 
ACDV
47D/839/CC Word file 99 kB
PDF file 58 kB
47D/839A/CC Word file 101 kB
PDF file 58 kB
2013-12-192013-11-30
CCDV
47D/850/CDV PDF file 7 kB
47D/850A/CDV
PDF file 349 kB
PDF file 318 kB
2014-03-282014-02-28
ADIS
47D/854/RVC Word file 103 kB
PDF file 55 kB
47D/854A/RVC Word file 104 kB
PDF file 139 kB
2014-08-222014-09-30
DEC
2015-11-132015-02-28
RDIS
2015-11-232015-11-30
CDIS
47D/878/FDIS PDF file 494 kB
PDF file 484 kB
2016-07-292016-02-15
APUB
 2016-09-30
BPUB
 2016-10-15
PPUB
 2016-11-15

Project

IEC 60191-6-13 Ed. 2.0

Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA)

 

Remark:

Project suspended since 2015-12-15 pending response from Secretary to IEC editor. Project plan - CDV: 2014-03, FDIS: 2014-09