International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub
Date

Stability

Date

SC 47D02Masashi OTSUKAPPUB2010-092016

History

Stage
Document
Downloads
Decision Date
Target Date
PNW
47D/722/NP pdf file 233 kB
2008-05-09 
ANW
47D/728/RVN pdf file 159 kB
47D/728A/RVN pdf file 158 kB
2008-09-192008-09-30
1CD
47D/733/CD pdf file 197 kB
2008-11-282009-09-30
ACDV
47D/741/CC pdf file 34 kB
47D/741A/CC pdf file 38 kB
2009-03-202009-04-30
CCDV
47D/743/CDV pdf file 148 kB
2009-05-082009-04-30
ADIS
47D/760/RVC pdf file 236 kB
2010-01-082010-01-15
DEC
2010-04-292010-01-31
RDIS
2010-05-042010-05-15
CDIS
47D/772/FDIS

2010-06-112010-07-31
APUB
47D/776/RVD pdf file 206 kB
2010-08-172010-08-15
BPUB
2010-08-182010-08-31
PPUB
2010-08-302010-09-30

Project

IEC 60191-6-21 Ed. 1.0

MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - Part 6-21: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline packages (SOP)

 

Remark:

- Targets CDV: 2010-09 FDIS: 2011-06