International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub

Date

Stability

Date

SC 47D02Hirofumi NAKAJIMAPPUB2010-012014

History

Stage
Document
Downloads
Decision Date
Target Date
PNW
47D/677/NP pdf file 1085 kB
2006-12-15 
ANW
47D/701/RVN pdf file 104 kB
2007-08-242007-04-30
1CD
47D/708/CD pdf file 714 kB
2007-12-212007-12-31
ACDV
47D/719/CC pdf file 125 kB
2008-05-092008-04-30
CCDV
47D/729/CDV pdf file 394 kB
pdf file 356 kB
47D/729F/CDV pdf file 356 kB
2008-09-262008-08-31
CCDV
47D/729/CDV pdf file 394 kB
pdf file 356 kB
47D/729F/CDV pdf file 356 kB
2008-10-24 
ADIS
47D/738/RVC pdf file 36 kB
47D/738A/RVC pdf file 64 kB
2009-03-202009-05-31
DEC
2009-08-262009-05-31
RDIS
2009-09-012009-09-15
CDIS
47D/753/FDIS
47D/753A/FDIS

2009-10-022009-11-30
APUB
47D/758/RVD pdf file 211 kB
2009-12-092009-12-15
BPUB
2009-12-102009-12-31
PPUB
2010-01-072010-01-31

Project

IEC 60191-6-18 Ed. 1.0

Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA)

 

Remark:

- Targets - CDV: 2008-08 FDIS: 2009-06; [2/06035] - IEC/PAS 60191-6-18