International
Electrotechnical
Commission
International Standards and Conformity Assessment
for all electrical, electronic and related technologies
SC 47D |
Semiconductor devices packaging |
Detail
Committee | Working Groups | Project Leader | Current Status | Frcst Pub Date | Stability Date |
|---|---|---|---|---|---|
| SC 47D | 02 | Masashi OSTUKA | DEL | 2007-12 |
History
Stage | Document | Downloads | Decision Date | Target Date | ||
|---|---|---|---|---|---|---|
| PNW |
| 2004-01-30 | ||||
| ANW |
| 2004-09-03 | 2004-06-15 | |||
| PWI | 2006-09-29 | 2005-12-31 | ||||
| PNW |
| 2006-11-03 | ||||
| DEL |
| 2007-06-29 | 2007-03-31 | |||
945 kBProject
IEC 60191-6-14 Ed. 1.0
Mechanical standardization of semiconductor devices - Part 6-14: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)
Remark:
- PR put to PWI acc to decision at Berlin, 2006-09-29 -then restart with NP-CD - US No 2/03-029 - Extension of targets approved by SMB/3099/R Cape Town 05-10-17
Associated Documents:
SMB/3130/DL
SMB/3298A/INF47D/671/CD