International
Electrotechnical
Commission
International Standards and Conformity Assessment
for all electrical, electronic and related technologies
SC 47D |
Semiconductor devices packaging |
Detail
Committee | Working Groups | Project Leader | Current Status | Frcst Pub Date | Stability Date |
|---|---|---|---|---|---|
| SC 47D | 01 | Munehiro Yamada | DEL | 2012-07 |
History
Stage | Document | Downloads | Decision Date | Target Date | ||||
|---|---|---|---|---|---|---|---|---|
| AMW |
| 2010-01-08 | ||||||
| 1CD |
| 2010-04-30 | 2010-02-28 | |||||
| CDM |
| 2010-08-20 | 2010-08-31 | |||||
| ACDV |
| 2011-05-27 | 2010-11-30 | |||||
| CCDV |
| 2011-06-27 | 2011-06-30 | |||||
| DEL |
| 2011-11-22 | 2012-02-29 | |||||
40 kB
90 kBProject
IEC 60191-6-1 Ed. 2.0
IEC 60191-6-1 Ed.2: Part 6-1: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for gull-wing lead terminals
Remark:
CDV: 2010-10 FDIS: 2011-07