International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub
Date

Stability

Date

SC 47D02S. NakamuraDELPUB2004-092009

History

Stage
Document
Downloads
Decision Date
Target Date
PNW
47D/253/NP pdf file 1491 kB
1998-11-13 
ANW
47D/291/RVN pdf file 17 kB
1999-03-311999-03-31
ACDV
1999-05-12 
1CD
47D/392/CDV pdf file 304 kB
2000-09-142000-07-31
CCDV
47D/392/CDV pdf file 304 kB
2000-09-152000-07-31
CDVM
47D/424/RVC pdf file 40 kB
2001-03-022001-05-31
ADIS
2001-10-152001-07-31
DEC
2002-04-222002-05-31
RDIS
2002-04-232002-06-30
CDIS
47D/508/FDIS
2002-06-072002-07-31
NCD
47D/518/RVD pdf file 133 kB
2002-08-162002-10-31
CCDV
47D/553/CDV pdf file 381 kB
2003-06-202003-05-31
ADIS
47D/573/RVC pdf file 101 kB
2004-01-232004-01-31
DEC
2004-04-132004-03-31
RDIS
2004-04-142004-04-30
CDIS
47D/584/FDIS
2004-06-042004-07-15
APUB
47D/587/RVD pdf file 168 kB
2004-08-092004-10-15
BPUB
2004-08-102004-11-15
PPUB
2004-09-292004-12-15
DELPUB
2009-11-26 

Project

IEC 60191-6 Ed. 2.0

Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

 

Remark:

- Validity extended with 47D/680/RM to 2009-12 - Validity date brgt forward acc to SMB/3266A/RV - EIAJ relationship (US: 2/94002) - former proj No 60191-6/A2/F12/Ed.1 - new manus after mtg May 2002 Eindhoven -

 

Associated Documents:

47D/318/RM

CA/1789/DL

47D/476/RM