International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub
Date

Stability

Date

SC 47D01Mr.Ichiro AnjohMERGED 2014

History

Stage
Document
Downloads
Decision Date
Target Date
PNW
47D/336/NP pdf file 117 kB
1999-12-17 
ANW
47D/368/RVN pdf file 16 kB
2000-04-142000-04-30
ACDV
2000-05-122000-06-30
CCDV
47D/398/CDV pdf file 35 kB
2000-09-222000-09-30
ADIS
47D/431/RVC pdf file 26 kB
2001-04-092001-04-30
DEC
2001-04-102001-05-31
RDIS
2001-04-102001-06-30
CDIS
47D/440/FDIS
2001-05-182001-07-15
APUB
47D/457/RVD pdf file 21 kB
2001-07-252001-08-31
BPUB
2001-07-262001-09-30
MERGED
2001-07-30 
PPUB
 2001-09-30

Project

IEC 60191-2 f47 Ed. 1.0

Proposal for 3-Leaded SMD (Body Size D x E : 2.9 x 1.5 mm) Outline Family 162E

 

Remark:

- Intended to be published as Outline 162-E (47D Sec: 98111)

 

Associated Documents:

47D/381/RM