International
Electrotechnical
Commission
International Standards and Conformity Assessment
for all electrical, electronic and related technologies
SC 47D |
Semiconductor devices packaging |
Detail
Committee | Working Groups | Project Leader | Current Status | Frcst Pub Date | Stability Date |
|---|---|---|---|---|---|
| SC 47D | 01 | Mr.Ichiro Anjoh | MERGED | 2013 |
History
Stage | Document | Downloads | Decision Date | Target Date | ||
|---|---|---|---|---|---|---|
| PNW |
| 1999-12-17 | ||||
| ANW |
| 2000-04-14 | 2000-04-30 | |||
| ACDV | 2000-05-12 | 2000-06-30 | ||||
| CCDV |
| 2000-09-22 | 2000-09-30 | |||
| ADIS |
| 2001-04-09 | 2001-04-30 | |||
| DEC | 2001-04-10 | 2001-05-31 | ||||
| RDIS | 2001-04-10 | 2001-06-30 | ||||
| CDIS |
| 2001-05-18 | 2001-07-15 | |||
| APUB |
| 2001-07-25 | 2001-08-31 | |||
| BPUB | 2001-07-26 | 2001-09-30 | ||||
| MERGED | 2001-07-30 | |||||
| PPUB | 2001-09-30 | |||||
117 kBProject
IEC 60191-2 f47 Ed. 1.0
Proposal for 3-Leaded SMD (Body Size D x E : 2.9 x 1.5 mm) Outline Family 162E
Remark:
- Intended to be published as Outline 162-E (47D Sec: 98111)
Associated Documents:
47D/381/RM