International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 

Detail

Committee
Working Groups
Project Leader

Current

Status

Frcst Pub
Date

Stability

Date

SC 47D01 MERGED 2014

History

Stage
Document
Downloads
Decision Date
Target Date
PNW
1986-09-01 
ANW
1986-09-02 
CDIS
47(C.O.)/1235/DIS  
1990-05-09 
APUB
47(C.O.)/1301/RVD  
1991-05-03 
MERGED
1995-01-12 

Project

IEC 60191-2 am1 f4 Ed. 1.0

Integrated circuits - Drawing family of leaded packages of Form E (Quad Flat packages), to be included in IEC 191-2

 

Remark:

- 47(C.O.)1145 withdrawn (VR: 47(C.O.)1210). - Transferred from TC 47. - Former 47.19.39.