International Standards and Conformity Assessment
for all electrical, electronic and related technologies
SC 47D |
Semiconductor devices packaging |

Detail
Committee | Working Groups | Project Leader | Current Status | Frcst Pub Date | Stability Date |
|---|---|---|---|---|---|
| SC 47D | 02 | Ichiro Anjoh | DEL |   |
History
Stage | Document | Downloads | Decision Date | Target Date | ||
|---|---|---|---|---|---|---|
| PNW |
| 1996-08-02 | ||||
| ANW |
| 1996-12-17 | 1996-12-17 | |||
| ACDV | 1997-09-19 | |||||
| DEL | 1999-01-12 | 1997-12-31 | ||||
Project
DEL 60191-6 am1 f3 Ed. 1.0
O value of leaded packages with two parallel rows of terminals in IEC 191-6, Appendix B1
Remark:
- Relationship TC 91 WG1.
Associated Documents:
47D/203/RM

