International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Semiconductor devices packaging

 
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SC 47D Work programme (5)

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Fcst. Publ.

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IEC 60191-1 Ed. 3.0  

Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
47D/842/CD2013-09CDM
  • CDM
  • Committee Draft to be discussed at Meeting

2014-08

A2CD
  • A2CD
  • Approved for 2nd Committee Draft

2016-02

WG 1M. Ahr2017-01
IEC 60191-2 f70 Ed. 1.0  

Proposed new package outline - P-ZMP-P165
47D/863/CDV2013-09ADIS
  • ADIS
  • Approved for FDIS circulation

2016-05

DEC
  • DEC
  • Draft at Editing Check

2016-12

WG 1M. Ahr2017-05
IEC 60191-2 f71 Ed. 1.0  

Proposed new package outline - P-ZMP-P89
47D/864/CDV2013-09ADIS
  • ADIS
  • Approved for FDIS circulation

2016-05

DEC
  • DEC
  • Draft at Editing Check

2016-12

WG 1M. Ahr2017-05
IEC 60191-2 f72 Ed. 1.0  

Proposed new package outline - P-UMP-Ax
47D/870/CD2015-06ACDV
  • ACDV
  • Draft approved for Committee Draft with Vote

2016-05

CCDV
  • CCDV
  • Draft circulated as Committee Draft with Vote

2016-12

WG 1M. Ahr2018-04
IEC 60191-6-13 Ed. 2.0  

Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
47D/850A/CDV2013-05RDIS
  • RDIS
  • Text for FDIS received and registered

2015-11

CDIS
  • CDIS
  • Draft circulated as FDIS

2016-02

WG 2J. Ohno2016-05