International Standards and Conformity Assessment for all electrical, electronic and related technologies

SC 47D

Boîtiers des dispositifs semi-conducteurs

 
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SC 47D Programme de Travail (6)

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IEC 60191-1 Ed. 3.0  

Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
47D/842/CD2013-09CDM
  • CDM
  • Committee Draft to be discussed at Meeting

2014-08

A2CD
  • A2CD
  • Approved for 2nd Committee Draft

2016-02

WG 1M. Ahr2017-01
IEC 60191-2 f70 Ed. 1.0  

Proposed new package outline - P-ZMP-P165
47D/863/CDV2013-09ADIS
  • ADIS
  • Approved for FDIS circulation

2016-05

DEC
  • DEC
  • Draft at Editing Check

2016-12

WG 1M. Ahr2017-05
IEC 60191-2 f71 Ed. 1.0  

Proposed new package outline - P-ZMP-P89
47D/864/CDV2013-09ADIS
  • ADIS
  • Approved for FDIS circulation

2016-05

DEC
  • DEC
  • Draft at Editing Check

2016-12

WG 1M. Ahr2017-05
IEC 60191-2 f72 Ed. 1.0  

Proposed new package outline - P-UMP-Ax
47D/870/CD2015-06ACDV
  • ACDV
  • Draft approved for Committee Draft with Vote

2016-05

CCDV
  • CCDV
  • Draft circulated as Committee Draft with Vote

2016-12

WG 1M. Ahr2018-04
IEC 60191-4 am1 Ed. 3.0  

Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
47D/882/CD2016-08AMW
  • AMW
  • Approved Maintenance Work

2016-08

A2CD
  • A2CD
  • Approved for 2nd Committee Draft

2016-12

WG 2S. Miyashita2018-12
IEC 60191-6-13 Ed. 2.0  

Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-13: Guide de conception pour les supports sans couvercle pour les boîtiers matriciels à billes et à pas fins (FBGA) et les boîtiers matriciels à zone de contact plate et à pas fins (FLGA)
47D/878/FDIS2013-05CDIS
  • CDIS
  • Draft circulated as FDIS

2016-07

APUB
  • APUB
  • Draft approved for publication

2016-09

WG 2S. Miyashita2016-11