International Standards and Conformity Assessment
for all electrical, electronic and related technologies
SC 47D |
Semiconductor devices packaging |

Convenor | National Committee | |
|---|---|---|
Mr Choon Heung Lee | KR | |
Member | National Committee |
|---|---|
| Mr Michael Ahr | DE |
| Mr Emil Virgil Ilian | RO |
| Mr SangGeun Lee | KR |
| Katsunori Mae | JP |
| Mr Hirofumi Nakajima | JP |
| Mr Shinichi Nakamura | JP |
| Mr Junichi Ohno | JP |
| Mr JoonShik Park | KR |
| Mr Yoshihiro Tomita | JP |
| Mr Munehiro Yamada | JP |
| Mr Hiroyoshi Yoshida | JP |
Title & Task
WG 1
Package outlines
Generation of outline drawings to ensure mechanical
interchangeability, automatic handling and mounting.
Organizations | Liaison Member |
|---|---|
| Liaison D | |
| JEITA | |



